Today’s serial data standards require extensive physical layer compliance tests. Understanding and performing the measurements of an eye diagram has become a mandatory part of high-speed communications system design.

The Eye Diagram is a methodology to represent and analyze a high speed digital signal by allowing the key parameters of the electrical signal quality to be quickly visualized and determined. A properly constructed eye should contain every possible bit sequence from simple alternate 1’s and 0’s to isolated 1’s after long runs of 0’s, and all other patterns that may show weaknesses in the design.

During this session, we will walk you through some tips and tricks to perform a good eye diagram measurement. We will focus on the following key points:

  • Tektronix DPOJET eye diagram and jitter analysis software
  • Measuring the eye diagram and basic jitter components
  • Perform the USB2.0 Signal Quality Compliance Test

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Presenter

Tan Ai Heong

Tan Ai Heong

Regional Application Engineer

As Regional Application Engineer, Ai-Heong is responsible for the high speed communication applications and products. Ai Heong was previously a Signal Integrity Engineer with Intel, with working expertise in IBIS modeling, timing simulation & analysis and product electrical validation.

Ai Heong received his Bachelor degree in Mechatronic from University Technology Malaysia. He then continued to earn his Master Degree with Honours from University Science Malaysia. His Thesis in signal integrity simulation and modeling for IC package via TSV process was published in the international conferences.